The present invention relates to load current detection circuits, and in particular to a load current detection circuit capable of changing its detection sensitivity by switching resistors while restraining the generation of noise spikes with minimal circuitry.
A load current detection circuit applies a predetermined voltage, proportional to an input voltage applied to an input amplifier, to a load and detects a voltage across a current detection resistor connected to the load in series in order to determine the current through the load from the predetermined voltage. In this circuit current detection resistors are switched to change current detection sensitivity as the load current changes in response to the voltage applied to the load or in response to the impedance of the load. However, when the current detection resistors are switched, a noise spike may be generated due to the response delay of the input amplifier. If the load is a semiconductor device, it may be damaged by the noise spike.
Japanese Patent Publication No. 64-8310 describes a conventional current detection circuit with a resistor switching circuit where generation of noise spikes is restrained. With this circuit an input voltage is applied to an inverting input of an operational amplifier having a high gain through an input resistor. An output current from the operational amplifier is applied to a load through a first current detection resistor and through a series circuit including a field effect transistor (FET), a second current detection resistor, and a first switch. The series circuit is connected in parallel with the first current resistor. The gate of the FET is connected to one terminal of a sawtooth signal generator which has another terminal connected to a common terminal of a second switch. The common terminal of the second switch is selectively connected to a first contact connected to the output of the operational amplifier, a second contact connected to an output of a voltage follower circuit and a third contact connected to a reference potential point. The voltage produced at the load also is applied to the inverting input of the operational amplifier through the voltage follower circuit and a third resistor for negative-feedback operation so that the voltage corresponding to the input voltage is applied to the load.
In operation the first switch is turned on while the FET is turned off by adjusting the output voltage of the sawtooth generator to be its maximum negative voltage. Then the output voltage of the saw tooth generator is increased at a constant rate smaller than the slew rate of the operational amplifier. The increase of current through the FET increases the voltage across the load, i.e., the load voltage. The output voltage of the operational amplifier decreases in response to the increase of the load voltage so that the gate voltage of the FET is kept at the pinch-off voltage to turn off the FET. Thus, since the current detection resistors are switched slowly, any noise spike is not applied to the load circuit.
However, this circuit needs multiple circuits consisting of an FET, a current detection resistor, a switch and a sawtooth generator, one for each sensitivity range. It may be possible to use one sawtooth generator for a plurality of FETs, but the gate of the FETs not connected to the sawtooth generator must be connected to a voltage source to keep the FETs in an off-state. Therefore the number of components increases as the number of switching ranges increases, raising the manufacturing cost.
What is desired is a load current detection circuit capable of restraining generation of noise spikes, produced when switching current detection sensitivity, which uses fewer components.